Fraunhofer AISEC: Security features for trusted electronics / 2024
European Chiplet Innovation: APECS Pilot Line starts Operation in the Framework of the EU Chips Act
The pilot line for “Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems” (APECS) marks a major leap forward in strengthening Europe’s semi-conductor manufacturing capabilities and chiplet innovation as part of the EU Chips Act. APECS will make a significant contribution to the European Union´s goals of increasing technological resilience, strengthening cross-border collaboration and enhancing its global competitiveness in semiconductor technologies. The Fraunhofer Institute for Applied and Integrated Security AISEC develops security features for trusted electronics in the heterointegration of chiplets.
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